Conclusions

This lab was mush tougher than previous labs. The complexity of the circuit itself was not a big problem. However:

• Lab hours are very limited. In addition, design data are not guaranteed to remain in the PC's. Hence back-up and restore become overhead.

• We do not have enough information for our design environment; Wish to have reference manual of XACT, OrCAD, etc.

• Design tools do not provide us enough information once we have a problem in the design. (Part of this problem may be due to lack of my knowledge and understanding of the tools)

• Even for small circuit, turn-around time (schematic entry to debug) is long, due to many stages to get the design downloaded into the proto-type board. Sometime we waste the time by waiting for proto-type boards become available. I would like to suggest proto-type boards to be fixed some PC's. We design on other PC's and get LCA files, then bring the LCA files to the PC with proto-type board connected.