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Next: Conclusions Up: CIS4930 Lab Report Lab Previous: Design and Implementation

Results and Discussion

The functionality of the traffic light controller was tested by giving input (i.e. a car is on the farm-road), and confirmed to work correctly. Since my partner has skipped the lab-hours from lab-5, I had to do all the stages by myself. Hence it was little too tough. Although Xilinx FPGAs are field-re-programmable, I am afraid our design strategy depend too much on the characteristic.

Our design procedures follow the steps below:

  1. Work on paper (Thinking block diagram etc)
  2. Schematic capture (OrCAD)
  3. Net-file generation
  4. Mapping and Routing (PPR, etc)
  5. Bitmap generation (XACT)
  6. Test (XACT)

In the real world, between step 3 and 4, there is a logic simulation step. I know OrCAD has simulation utility, but cannot try due to limitation of the schedule. In addition. shortage of FPGA board makes debugging more difficult.



Hitoshi Oi
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