Edge-Map was developed by Yang and Wong of University of Texas, Austin, and presented at International Conference on Computer-Aided Design [8], in 1994. This technology mapping algorithm achieves provably optimal delay in the generated circuit. FlowMap [9] also deals with delay optimization. The difference is Edge-Map assures that every edge from a node has a bounded delay. Edge-Map consists of two phases: labeling phase which is similar to decomposition of finding a feasible network, but delay optimization is taken into account here, and generating phase, which generates a network of LUT's in a bottom-up manner (from the primary outputs toward the primary inputs) according to the result of labeling phase. Edge-Map generated slightly more LUT's than FlowMap in 8 of 10 MCNC benchmark circuits. But it improved circuit delay in all of MCNC circuits, with average of 27.8%.
